Автоматический перебор параметров архитектуры

★ 7.1 · engineering

dse-loop is a Claude Code skill that autonomously runs a design space exploration loop for computer architecture and EDA problems: it executes a program, analyzes the output, selects the next parameter configuration, and iterates until the objective metric is reached or the time budget expires. Built-in loop constants include a 2-hour timeout, a hard cap of 50 evaluated design points, and early stopping after 10 consecutive iterations without improvement — all overridable via arguments. Supported use cases span gem5 microarchitecture sweeps, yosys/DC synthesis tuning, RTL parameterization with Verilator, gcc/llvm compiler flag optimization, OpenROAD placement and routing, abc/sby formal verification, and memory subsystem exploration with CACTI or Ramulator. When parameter ranges are not fully specified, the skill infers them from source code and domain knowledge, logging the inferred space to dse_results/inferred_params.md for review. It is designed for hardware and EDA engineers who need hands-free iterative tuning to minimize area, latency, or energy without manually managing the search loop.