Бенчмарк S-expression пайплайна для PCB-проектов

engineering

sexp_bench is a Claude Code skill that benchmarks the S-expression pipeline used in atopile, measuring throughput per stage, peak memory per stage, and end-to-end latency on realistic KiCad PCB inputs. The skill targets the parser and compiler internals of atopile, where declarative `.ato` files pass through multiple pipeline stages before producing KiCad layout updates. Running these benchmarks helps pinpoint bottlenecks—such as slow parse stages or excessive memory allocation—before they reach production. It is aimed at performance engineers and core contributors who need data-driven insights when optimizing throughput and memory usage across complex PCB design workloads.